METHOD AND SYSTEM OF FAST CLEARING OF MEMORY USING A BUILT-IN SELF-TEST CIRCUIT
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United States of America Patent
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Issued Date -
Aug 14, 2008
app pub date -
Feb 11, 2008
filing date -
Feb 13, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Systems, devices and methods for clearing memory using a built-in self-test circuit are disclosed. In one embodiment, a device for clearing memory using a built-in self-test circuit comprises a clear memory module added to a memory built-in self-test (MBIST) controller generating a signal for clearing one or more memory modules and one or more wrapper circuits with each wrapper circuit comprising an address generator module forwarding a range of addresses associated with the clearing the memory modules, a write data generator module forwarding a pattern of logical zeroes to the range of addresses and a finite state machine controlling writing the pattern to the range of addresses based on the signal for the clearing the memory modules.
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