ERROR INJECTION IN PCI-EXPRESS DEVICES
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United States of America Patent
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Issued Date -
Jul 3, 2008
app pub date -
Jan 24, 2007
filing date -
Dec 28, 2006
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Method and system for forcing PCI-Express errors in a downstream path and upstream path is provided. The downstream path method includes enabling an error forcing function; determining if an additional stimulus is used for enabling an error condition; sending the additional stimulus to trigger error detection; and detecting a forced error condition at a qualifying event. The upstream path method includes enabling an error forcing function; determining if an additional stimulus is used for enabling an error condition; sending a stimulus to trigger error detection; inserting a forced error condition at a qualifying event; wherein a downstream PCI-Express device inserts the error condition; and detecting the forced error condition; wherein an upstream PCI-Express device detects the forced error condition.
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