Bi-directional transient blocking unit having a dual-gate transistor
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United States of America Patent
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Issued Date -
May 29, 2008
app pub date -
Nov 21, 2007
filing date -
Nov 21, 2006
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Abandoned
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Abstract
An improved bi-directional transient blocking unit (TBU) is provided having a dual-gate central transistor. The gates of the central transistor are connected to the rest of the TBU such that high voltages can only appear between a gate and the central transistor terminal further from that gate. In this manner, the total device size required to provide a given breakdown voltage can be significantly reduced compared to a conventional symmetric lateral transistor having a single gates.
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