INTEGRATED CIRCUIT CHIPS WITH FINE-LINE METAL AND OVER-PASSIVATION METAL
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United States of America Patent
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Issued Date -
Apr 3, 2008
app pub date -
Sep 30, 2007
filing date -
Sep 29, 2006
priority date (Note) -
Abandoned
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Abstract
An integrated circuit chip includes a silicon substrate, a first circuit in or over said silicon substrate, a second circuit device in or over said silicon substrate, a dielectric structure over said silicon substrate, a first interconnecting structure in said dielectric structure, a first pad connected to said first node of said voltage regulator through said first interconnecting structure, a second interconnecting structure in said dielectric structure, a second pad connected to said first node of said internal circuit through said second interconnecting structure, a passivation layer over said dielectric structure, wherein multiple opening in said passivation layer exposes said first and second pads, and a third interconnecting structure over said passivation layer and over said first and second pads.
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