INTEGRATED CIRCUIT SYSTEM HAVING STRAINED TRANSISTOR
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United States of America Patent
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Issued Date -
Feb 21, 2008
app pub date -
Aug 19, 2006
filing date -
Aug 19, 2006
priority date (Note) -
Abandoned
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Abstract
An integrated circuit system is provided including forming a circuit element on a wafer, forming a stress formation layer on the wafer, protecting a portion of the stress formation layer, and irradiating the wafer for modification of a stress value of an unprotected portion of the stress formation layer.
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