Stereo Separation Adjustment Circuit And Mos Integrated Circuit Thereof

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20080030271A1
SERIAL NO

11630842

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A stereophonic separation can be adjusted without narrowing the dynamic range. Between the sources of a MOS transistor (Q5), to which a composite signal is inputted, and a MOS transistor (Q6), to which a reference voltage is inputted, there are connected in parallel the series connections of resistors and switch elements (R1) and (SW1), (R2) and (SW2), (R3) and (SW3), and so on. The separation level can be so adjusted in DC operations that the resistors (R1 to R5) may exert no influence on the output voltage of the MOS transistor (Q5), and in AC operations that the values of the parallel resistors (R1 to R5) may be varied.

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Patent Owner(s)

Patent OwnerAddress
NIIGATA SEIMITSU CO LTD5-13 NISHISHIROCHO 2-CHOME JOETSU-SHI NIIGATA 943-0834

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aoyama, Takashi Kariya, JP 95 1219
Miyagi, Hiroshi Yokohama, JP 103 319

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