Method for fabricating multi-layered printed circuit board without via holes
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United States of America Patent
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Issued Date -
Jan 24, 2008
app pub date -
Jul 21, 2006
filing date -
Jul 21, 2006
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method for fabricating a multi-layered printed circuit board without via holes is disclosed herein, which includes the steps of: providing a plurality of layers of printed circuit boards each having circuits pre-formed thereon; stacking the plurality of layers of the printed circuit boards; and electrically connecting corresponding pads on the plurality of layers of the printed circuit boards; wherein the circuits to be connected with each other on different layers of the printed circuit boards are electrically connected to the pads that are extended to an edge of the printed circuit boards. The multi-layered printed circuit board without via holes in accordance with the present invention can overcome the prior disadvantages caused by the via holes.
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