System and method for forming through wafer vias using reverse pulse plating
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United States of America Patent
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Issued Date -
Jan 10, 2008
app pub date -
Jul 10, 2006
filing date -
Jul 10, 2006
priority date (Note) -
Abandoned
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Abstract
A method for forming through wafer vias in a substrate uses a Cr/Au seed layer to plate the bottom of a blind trench formed in the front side of a substrate. Thereafter, a reverse plating process uses a forward current to plate the bottom and sides of the blind hole, and a reverse current to de-plate material in or near the top. Using the reverse pulse plating technique, the plating proceeds generally from the bottom of the blind hole to the top. To form the through wafer via, the back side of the substrate is ground or etched away to remove material up to and including the dead-end wall of the blind hole.
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