Surface Modification Method for Solid Sample, Impurity Activation Method, and Method for Manufacturing Semiconductor Device

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United States of America Patent

SERIAL NO

11587815

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Abstract

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The present invention intends to provide a method for manufacturing a semiconductor device in which source/drain extension regions having a uniform depth are created with high reproducibility. This objective is achieved by the following method: A gate electrode 24 is formed on a semiconductor substrate 21 via a gate insulator 23. The portion of the semiconductor substrate 21 other than the gate electrode 24 is irradiated with an ultra-short pulsed laser light having a pulse width within a range from 10 to 1000 femtoseconds in order to create an amorphous layer 26a. Then, recesses 27 are created in the semiconductor substrate 21 by selectively etching the amorphous layer 26a. The recesses 27 are filled with semiconductor layers 28 whose impurity concentration is higher than that of the semiconductor substrate 21, and the source/drain extension regions 31 are created there. Within the region other than the gate electrode 24 and the source/drain extension regions 31, Deep diffusion layers 30 deeper than the source/drain extension regions 31 are created.

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Patent Owner(s)

Patent OwnerAddress
EMD CORPORATIONSHIGA 520-2323

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujita, Masayuki Mino-shi, JP 174 1511
Hashida, Masaki Osaka-shi, JP 8 54
Setsuhara, Yuichi Mino-shi, JP 23 136

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