Integrated Circuit with Debug Support Interface
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United States of America Patent
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N/A
Issued Date -
Dec 6, 2007
app pub date -
Nov 29, 2004
filing date -
Dec 19, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A high speed debug support interface has circuits to interface on-chip debug support circuits to a high bandwidth communications port means located on the surface of a system integrated circuit (101) and to on-chip debug support circuits (100). The communication port means can be realised by bonding or integrating special sender and or receiver cells preferably optical sender cells (103) and or optical receiver cells (110) onto the surface of the system integrated circuit (101). The high speed debug support interface communicates with on-chip or in-assembly debug support circuits and an external development tool (108) to permit hardware and software related debugging and development activities, including program tracing, data tracing and memory substitution. The high speed debug support interface has circuits to interface on-chip debug support circuits to system resources such as memory located within the device assembly (102) and connected by the system interconnect.
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