Integrated circuit memory device having dynamic memory bank count and page size
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United States of America Patent
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Jul 13, 2010
Grant Date -
Nov 22, 2007
app pub date -
Aug 7, 2007
filing date -
Sep 30, 2004
priority date (Note) -
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Abstract
An integrated circuit memory device has a storage array with an adjustable number of memory banks, a row of sense amplifiers to access storage cells in the storage array; and memory access control circuitry. The memory access control circuitry provides a first number of memory banks and a first page size in the integrated circuit memory device in a first mode of operation, and provides a second number of memory banks and a second page size in the integrated circuit memory device in a second mode of operation. The memory access control circuitry includes logic circuitry to adjust the number of memory banks in the integrated circuit memory device, and to adjust the page size of the integrated circuit memory device.
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