Parallel programming of flash memory during in-circuit test
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United States of America Patent
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Issued Date -
Nov 8, 2007
app pub date -
Jun 15, 2006
filing date -
May 4, 2006
priority date (Note) -
Abandoned
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Abstract
A method and system for parallel programming flash devices during in-circuit testing is described. A parallel processing device is located in a test fixture of an In-Circuit Tester (ICT) for each printed circuit board (PCB) connected to the test fixture. The parallel processing device controls the communications between the ICT and the PCB. The parallel processing device facilitates parallel programming of flash devices that passed in-circuit testing. The parallel processing device prevents programming of flash devices that failed in-circuit testing.
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