Reverse polish notation device for handling tables, and electronic integrated circuit including such a processing device
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United States of America Patent
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Issued Date -
Sep 27, 2007
app pub date -
Jan 24, 2007
filing date -
Jan 24, 2006
priority date (Note) -
Abandoned
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Abstract
The disclosure relates to a reverse Polish notation processing device making it possible to execute a set of instructions and implementing management of a stack whose size is variable. The device includes a storage device including a random access memory; a device for managing a stack pointer, which is a physical address, in said random access memory, associated with a reference stage of the stack; and a device for managing reference element pointer(s), which is a physical address, in said random access memory, associated with one reference element among elements of a given table contained in the stack. The processing device can execute at least one table-handling instruction with respect to the reference element pointer(s).
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