Semiconductor integrated circuit and test system for testing the same
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United States of America Patent
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Issued Date -
Aug 23, 2007
app pub date -
Apr 19, 2007
filing date -
Jan 17, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A semiconductor integrated circuit includes a pin section, internal circuits, an interface section, an expectation value generation circuit, a comparison circuit and a waveform generation circuit. In a first test mode, the expectation value generation circuit generates expectation values of operation signals to be generated by the interface section when first test signals having the same waveform are input via respective pins of the pin section, and the comparison circuit compares operation signals that are actually produced by the interface section with the respective expectation values and produces comparison results. In a second test mode, the waveform generation circuit supplies second test signals to the interface section, and the interface section outputs test output signals having the same waveform to the external system via respective pins of the pin section.
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