Customizable power and ground pins
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United States of America Patent
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Issued Date -
Aug 16, 2007
app pub date -
Feb 16, 2006
filing date -
Feb 16, 2006
priority date (Note) -
Abandoned
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Abstract
A configurable logic array composed of: a multiplicity of logic cells, each containing look-up tables, a multiplicity of customizable I/O cells, each containing a multiplicity of pads; and a customizable via connection layer for customizing the cells and interconnect between them, may be constructed to include the option of customizing the I/O cells to act as power or ground pins. Assigning custom power and ground pins may depend on the types of I/O cells and package bonding options.
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