High voltage semiconductor device having a lateral channel and enhanced gate-to-drain separation
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United States of America Patent
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app pub date -
Feb 27, 2007
filing date -
Mar 29, 2005
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Abstract
A semiconductor device having a lateral channel with contacts on opposing surfaces thereof. The semiconductor device includes a conductive substrate having a source contact covering a substantial portion of a bottom surface thereof. The semiconductor device also includes an isolation layer above the conductive substrate, a lateral channel above the isolation layer and a drain contact above the lateral channel. The semiconductor device further includes a gate located in a gate recess interposed between the lateral channel and the drain contact and a drain formed by at least one source/drain contact layer interposed between the lateral channel and the drain contact. The drain is offset on one side of the gate by a gate-to-drain separation distance. The semiconductor device still further includes an interconnect that connects the lateral channel to the conductive substrate operable to provide a low resistance coupling between the source contact and the lateral channel.
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