Importance

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Abstract

A bit line sensing scheme is provided for a semiconductor memory device that significantly reduces current drain during a self-refresh mode. After bit line sensing of a selected wordline and deactivation of the selected wordline, a capacitor is connected to a source node associated with a bit line sensing amplifier for the selected wordline to charge the capacitor with charge remaining on the bit line. Then, during the next activate-precharge cycle for another selected wordline, the capacitor is coupled to the source node of a bit line sensing amplifier associated with another selected wordline to discharge charge stored by the capacitor to the bit line associated with said other selected wordline. Thus, charge is returned from the bit line to the capacitor. This is where the self-refresh current reduction is achieved.

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First Claim