Semiconductor chip mounted interposer, semiconductor device, semiconductor chip interposer fabrication method, bare chip mounted interposer, and interposer sheet

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United States of America Patent

APP PUB NO 20070132080A1
SERIAL NO

10595424

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Abstract

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A semiconductor chip mounted interposer (60) is configured by executing wire bonding between a semiconductor chip (50) and an interposer (20), in which terminals (21) that connect to terminals (51) of the chip (50) and separate terminals (22) are formed, on the upper face of the interposer (20). A semiconductor chip (30) is mounted to the top face of a package substrate (10), the interposer (60) is adhered to the upper portion of the chip (30), and wire bonding is executed between the terminals (22) and terminals (11'). When configuring a semiconductor device with a plurality of semiconductor chips combined into one package in this manner, KGD (Known-Good-Die) can easily be guaranteed for each semiconductor chip, and semiconductor devices can be fabricated with a high yield of good units. Also, the semiconductor chips can be used as-is, without restricting the position, pitch, signal arrangement, or the like, of their terminals.

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Patent Owner(s)

Patent OwnerAddress
GENUSION INCAMAGASAKI

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ajika, Natsuo Hyogo, JP 75 1877
Kobayashi, Kazuo Hyogo, JP 333 6984
Nakashima, Moriyoshi Hyogo, JP 15 117

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