Controlling removal rate uniformity of an electropolishing process in integrated circuit fabrication

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United States of America Patent

APP PUB NO 20070131561A1
SERIAL NO

10583516

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Abstract

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An electropolishing process in integrated circuit fabrication on a wafer includes applying a stream of electrolyte to the wafer using a nozzle positioned adjacent to the wafer with a gap between the nozzle and the wafer. The removal rate uniformity of the electropolishing process is controlled by adjusting the gap between the nozzle and the wafer to adjust the removal rate profile of the stream of electrolyte applied by the nozzle.

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Patent Owner(s)

Patent OwnerAddress
ACM RESEARCH INC46520 FREMONT BLVD SUITE 610 FREMONT CA 94538

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chokshi, Himanshu J Fremont, CA 7 284
Gutman, Felix San Jose, CA 6 111
Wang, Hui Fremont, CA 1115 8921

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