Controlling removal rate uniformity of an electropolishing process in integrated circuit fabrication
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United States of America Patent
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Issued Date -
Jun 7, 2007
app pub date -
Feb 23, 2005
filing date -
Feb 23, 2004
priority date (Note) -
Abandoned
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Abstract
A metal layer formed on a wafer, the wafer having a center portion and an edge portion, is electropolished by aligning a nozzle and the wafer to position the nozzle adjacent to the center portion of the wafer. The wafer is rotated. As the wafer is rotated, a stream of electrolyte is applied from the nozzle onto a portion of the metal layer adjacent to the center portion of the wafer to begin to electropolish the portion of the metal layer with a triangular polishing profile to initially expose an underlying layer underneath the metal layer at a point.
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