Power-on reset circuit for an integrated circuit
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United States of America Patent
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Issued Date -
May 10, 2007
app pub date -
Nov 7, 2005
filing date -
Nov 7, 2005
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A power-on reset circuit for an integrated circuit has a trigger unit that includes (i) a first voltage drop element with a first terminal for coupling to a supply voltage, and a second terminal; (ii) a second voltage drop element with a first terminal, coupled to the second terminal of the first voltage drop element, and a second terminal; and (iii) an inverter with an input, coupled to the first terminal of the second voltage drop element, and an output. A discharge unit is provided to conduct a current from the trigger unit during a decrease of the supply voltage to decrease the voltage at the input of the first inverter, and substantially block current from the trigger unit during an increase of the supply voltage.
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