Memory DMA interface with checksum
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United States of America Patent
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N/A
Issued Date -
Jan 25, 2007
app pub date -
Jul 21, 2005
filing date -
Jul 21, 2005
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A system and method comprising a direct memory access (DMA) circuit configured to directly access a memory, and a checksum adder configured to determine a checksum for data transferred between the DMA circuit and the memory.
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