Configurable processor architecture for use in multi-standard communications
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United States of America Patent
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app pub date -
Sep 5, 2006
filing date -
Nov 15, 2002
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Abstract
A processor system includes a programmable very long instruction word (VLIW) processor which is closely coupled to a data memory. There is also provided a memory for storing instruction words for the VLIW processors. A memory access unit is coupled to a data memory and at least one input side is dedicated processor is coupled between a data input and the memory access unit. Furthermore, at least one output side dedicated processor is coupled between the memory access unit and the data output. The input and output side data processors perform operations common to a plurality of data processors on input and output data and the VLIW processor performs operations on data particular to a process being performed by the processor system. The VLIW processor is loaded with different sets of instruction words in dependence on the process being performed by the processor system.
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