Asymmetric bidirectional transient voltage suppressor and method of forming same
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United States of America Patent
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Issued Date -
Sep 28, 2006
app pub date -
Mar 25, 2005
filing date -
Mar 25, 2005
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Abstract
A bi-directional transient voltage suppression device and a method of making same is provided. The method begins by providing a semiconductor substrate of a first conductivity type, and depositing a first epitaxial layer of a second conductivity type opposite the first conductivity type on the substrate. The substrate and the first epitaxial layer form a first p-n junction. A second epitaxial layer having the second conductivity type is deposited on the first epitaxial layer. The second epitaxial layer has a higher dopant concentration than the first epitaxial layer. A third layer having the first conductivity type is formed on the second epitaxial layer. The second epitaxial layer and the third layer form a second p-n junction.
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