Method and system for calibrating input voltage of voltage controlled oscillator and digital interface used for calibrating input voltage

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United States of America Patent

PATENT NO 7301406
APP PUB NO 20060208808A1
SERIAL NO

11368627

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method and a system for calibrating an input voltage of a voltage controlled oscillator and a digital interface used for calibrating the input voltage. The method includes: setting a lock detection time for tuning a signal phase; setting a lock detection voltage section; setting output frequency values at predetermine spacings; checking connection states of capacitors of the capacitor bank necessary for a lock of the output frequency values; storing information regarding the connection states of the capacitors in the output frequency values; and if one of the output frequency values is determined depending on a change of a channel, setting connection states of the capacitors according to the information regarding the connection state corresponding to the one frequency value. The capacitor bank includes: a predetermined number of capacitors having different capacitances and connected to one another in parallel; and switches connected to the capacitors in series.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTDGYEONGGI DO SOUTH KOREA GYEONGGI-DO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bang, Hee-mun Seoul, KR 12 93
Jeon, Sang-yoon Seoul, KR 14 185
Jung, Sung-jae Seoul, KR 15 88
Kim, Chong-ouk Goyang-si, KR 2 6
Kim, Dae-ki Seongnam-si, KR 10 25
Lee, Heung-bae Suwon-si, KR 37 449

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