Ultra-small Profile, Low Cost Chip Scale Accelerometers of Two and Three Axes Based on Wafer Level Packaging
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United States of America Patent
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Issued Date -
Aug 17, 2006
app pub date -
Feb 11, 2005
filing date -
Feb 11, 2005
priority date (Note) -
Abandoned
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Abstract
Several micro-machined, ultra-profile two-axis and three-axis accelerometers are fabricated by CMOS-compatible process, which makes them suitable for volume production. The x, y axis signal is based on natural thermal convection, and z-axis signal may be based on thermal convention or piezoresistive in nature. The bulk MEMS (Micro-Electro-Mechanical-Systems) process is based on Deep Reactive Ion Etching (DRIE). After the front-end fabrication process, the accelerometers are packaged at wafer level by glass frit and/or anodic bonding, which lowers the device cost.
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