Parallel processing platform with synchronous system halt/resume

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United States of America Patent

APP PUB NO 20060150007A1
SERIAL NO

10524501

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Abstract

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A method for synchronous debugging of a parallel processing platform, the platform comprising a plurality of processors executing code, the code including one or more breakpoints to allow debugging of the code. The method comprises upon a processor reaching a breakpoint, propagating a halt command to all of the processors in the platform; thereby halting system execution synchronously to enable examination of the states of the processors.

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Patent Owner(s)

Patent OwnerAddress
ELTA SYSTEMS LTD100 YITZCHAK HANASSI BLVD P O B 330 ASHDOD 7710201

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dorf, Shaul Ashdod, IL 1 10
Gostynski, Victor Ashdod, IL 4 114

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