Method for fabricating low leakage interconnect layers in integrated circuits

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20060099800A1
SERIAL NO

10984701

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method for fabricating a low leakage integrated circuit structure. An antireflective layer is disposed without intervening layers directly onto the top of an interconnect conductor, and a dielectric layer is disposed over the antireflective layer. The interconnect conductor is aluminum; the antireflective layer is titanium nitride, and the antireflective layer has thickness less than or equal to 650 angstroms and greater than or equal to 150 angstroms. A contact window is opened with the contact window extending at least down to the antireflective layer.

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Patent Owner(s)

Patent OwnerAddress
APTINA IMAGING CORPORATIONWALKER HOUSE 87 MARY STREET GEORGE TOWN GRAND CAYMAN KY1-9002

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Crook, Mark D Fort Collins, CO 10 155
Lindahl, Kirk A Louisville, CO 2 1
Meyer, Jay Fort Collins, CO 8 26
Palsule, Chintamani Fort Collins, CO 23 399
Stanback, John H Fort Collins, CO 17 626
Theil, Jeremy A Mountain View, CA 33 596

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