Short channel insulated-gate static induction transistor and method of manufacturing the same
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United States of America Patent
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app pub date -
Sep 9, 2005
filing date -
Apr 27, 2001
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Abandoned
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Abstract
The ultra high-speed vertical short channel insulated-gate static induction transistor with uniform operating characteristic which has the drain layer 3 consisting of an epitaxial single crystal layer on the main surface 2 of substrate 1, the channel layer 4 with thickness 1000 .ANG. or less on the drain layer, the source layer 5 consisting of an epitaxial single crystal layer on the channel layer 4, and the insulated-gates 6 and 7 on the sidewalls of the drain, the channel, and the source layers. Since the thickness of 1000 .ANG. or less is accurately controlled using the molecular layer epitaxial method and the channel layer 4 is grown up, the X-ray photolithography is not needed. Since the gate oxide film is formed by low temperature CVD using active oxygen, impurity re-distribution does not occur.
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