Silicon wafer, its manufacturing method, and its manufacturing apparatus
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United States of America Patent
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Issued Date -
Jan 26, 2006
app pub date -
Nov 14, 2003
filing date -
Nov 14, 2002
priority date (Note) -
Abandoned
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Abstract
The production yield about defect free devices is improved by so controlling the size and density of void defects that they are under predetermined levels without marring the productivity. The pull-up speed V of a silicon crystal (10) by a pull-up mechanism (4) is controlled, and the rate of cooling by a cooler (30) is also controlled. As a result, the axial temperature gradient G.sub.1 at and near the melting point of the silicon crystal (10) is increased. The growth condition V/G.sub.1 is lowered to a temperature near the critical value under the condition that the growth rate V lies in the range from 97% to 75% of the limit rate Vmax and that the solid-liquid interface is convex with respect to the melt surface. Thus a silicon crystal (10) is grown by pulling up.
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