Buffer controller between memories and method for the same
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United States of America Patent
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Issued Date -
Oct 6, 2005
app pub date -
Mar 31, 2004
filing date -
Mar 31, 2004
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A buffer controller between a first and a second memories is used to control the buffer during data transmission process for memories. The buffer controller between memories has a microprocessor used to process the data transmission of the memory bus, a first memory connected to the microprocessor, and a second memory also connected to the microprocessor. The first memory and the second memory therefore transmit data under the control of the microprocessor.
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