Circuit and method for broadband switching noise suppression in multilayer printed circuit boards using localized lattice structures
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United States of America Patent
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Issued Date -
Sep 22, 2005
app pub date -
Mar 18, 2004
filing date -
Mar 18, 2004
priority date (Note) -
Abandoned
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Abstract
An apparatus for suppressing noise in an electronic device includes a multiple layer structure in which localized arrays of chip capacitors and/or patches around sources of electromagnetic waves are used. The PCB includes multiple conductive layers at different potentials, dielectric layers separating the conductive layers, conductive rods extending between at least two of the conductive layers, and a layer of patches disposed adjacent or on one or more of the conductive layers. The conductive rods are connected to one of the conductive layers and chip capacitors connect the conductive rods to another of the conductive layers. A particular location can be effectively isolated from noise using a few unit cells of an array of patches/capacitors partially or completely surrounding the particular location.
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