Wafer, intermediate wafer assembly and associated method for fabricating a silicon on insulator wafer having an improved edge profile
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jul 28, 2005
app pub date -
Jan 22, 2004
filing date -
Jan 22, 2004
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A wafer, an intermediate wafer assembly and an improved method of fabricating a wafer having an improved edge profile are provided. The wafer may have various edge profiles that eliminate, or at least reduce, the chamfered portion proximate one of the major surfaces. For example, the wafer may have an edge with curved surface extending continuously from one major surface to another, an angled edge segment adjacent one major surface and a curved surface extending from the angled edge segment to the other major surface, or first and second angled edge segments adjacent the opposed major surfaces and a curved surface extending therebetween with the second angled edge segment being at least 50% smaller in a radial direction than the first angled edge segment. The wafer may serve as the bonded wafer, the handle wafer, or both the bonded and handle wafers of an SOI wafer.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully