Method for integrating ethernet switch system and RTL design environment
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United States of America Patent
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Issued Date -
Jul 7, 2005
app pub date -
Mar 8, 2004
filing date -
Dec 5, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The present invention relates to a method for integrating an Ethernet switch system and a RTL design environment. The primary object of the present invention is to create a common communication channel between a system designer and an IC designer, more particularly to provide a converter program capable of converting a system verification means into a source of RTL verification, and the converter further having a function of self comparison, such that a fast and universal verification flow and database can be attained, and therefore a common consensus can be acquired between the system designer and the IC designer so as to reduce the product defects caused by designing. Moreover, an originally graphic user interface (GUI) is transformed into an ASCII character table to make the system designer and the IC designer have a good communication interface.
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