Method for fabricating self-aligned thin-film transistor
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United States of America Patent
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Issued Date -
Jul 7, 2005
app pub date -
Mar 22, 2004
filing date -
Jan 5, 2004
priority date (Note) -
Abandoned
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Abstract
The present invention relates to a method for fabricating a self-aligned TFT (thin-film transistor). The method comprises depositing a metal layer on a substrate; patterning the metal layer with a desired gate pattern by photolithography and etching; forming a gate insulation layer, a semiconductor layer, an ohmic contact layer, and a transparent conductive layer on the substrate in sequence to form a multilayer structure; back exposing a negative photoresist layer formed on the transparent conductive layer with the gate pattern as a mask; removing the unexposed portion of the negative photoresist layer; and forming a drain and a source of a self-aligned TFT after performing a conventional process of a multi-layer semiconductor. The method of the present invention improves the problem of color mura (uneven hue) occurred in LCD which results from uneven parasitic capacitor (Cgd) inside LCD panel between the gate and the drain.
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