VERY LONG INSTRUCTION WORD ARCHITECTURE
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United States of America Patent
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Issued Date -
May 26, 2005
app pub date -
May 28, 2004
filing date -
Nov 26, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A very long instruction word (VLIW) architecture has a VLIW input port for sequentially inputting a plurality of VLIWs, a decoder for decoding a plurality of instructions of the VLIWs, at least a register, a plurality of data buses, a plurality of arithmetic logic units (ALUs) for executing the instructions, and a plurality of multiplexers. Each output port of the multiplexers is connected to one of the ALUs, and each input port of the multiplexers is connected to the register and output ports of the ALUs via the data buses. Each of the multiplexers selects two outputs from the outputs of the register and the ALUs so that the connected ALU executes one of the instructions to operate the two selected outputs.
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