Notch-free etching of high aspect SOI structures using a time division multiplex process and RF bias modulation
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United States of America Patent
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Issued Date -
May 26, 2005
app pub date -
Oct 18, 2004
filing date -
Oct 21, 2003
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Abandoned
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Abstract
The present invention provides a method and an apparatus for reducing, or eliminating, the notching observed in the creation of SOI structures on a substrate when plasma etching through an alternating deposition/etch process by modulating the RF bias that is applied to the cathode. Modulation of the bias voltage to the cathode is accomplished either discretely, between at least two frequencies, or continuously during the alternating deposition/etch process.
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