Methods for designing a circuit
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United States of America Patent
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Issued Date -
Apr 28, 2005
app pub date -
Oct 24, 2003
filing date -
Oct 24, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
In one embodiment, the present invention is directed to a method of designing an application specific integrated circuit (ASIC). The method comprises (a) performing static timing analysis on versions of an ASIC design multiple times before routing the ASIC design utilizing path delays that are estimated according to cardinality of fanout of nets of the ASIC design and (b) performing static timing analysis on versions of the ASIC design multiple times before routing the ASIC design utilizing path delays that are calculated from estimated routing distances within a current version of the ASIC design, wherein step (a) is performed more frequently than step (b).
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