Memory device load simulator
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United States of America Patent
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Issued Date -
Apr 21, 2005
app pub date -
Sep 29, 2004
filing date -
Sep 29, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A load simulator is configured to simulate a load characteristic of at least one memory device. The memory device has a plurality of device contacts configured to be electrically coupled to a plurality of module contacts on a printed circuit board of a memory module. Each device contact has a load capacitance. The load simulator includes a package having a first face and a plurality of simulator contacts on the first face. The simulator contacts are configured to be electrically coupled to the module contacts. Each simulator contact has a simulator capacitance approximately equal to the load capacitance of a corresponding device contact of the at least one memory device.
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