Silicon on insulator device and layout method of the same
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United States of America Patent
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app pub date -
Oct 4, 2004
filing date -
Oct 29, 2001
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Abandoned
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Abstract
A silicon on insulator (SOI) semiconductor device includes a wire connected to doped regions formed in an active layer of a SOl substrate. A ratio of the area of the wire to the doped region or a ratio of the area of contact holes formed on the wire to the doped region is limited to a predetermined value. When the ratio exceeds the predetermined value, a dummy doped region is added to prevent the device from being damaged during a plasma process.
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