METHOD OF FABRICATING LOW TEMPERATURE POLYSILICON THIN FILM TRANSISTOR
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United States of America Patent
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Issued Date -
Mar 17, 2005
app pub date -
Sep 17, 2003
filing date -
Sep 17, 2003
priority date (Note) -
Abandoned
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Abstract
First, a substrate with a polysilicon film is provided. Then, a gate insulating layer and a gate are formed on the polysilicon film in sequence. An ion implantation process is performed to form a source and a drain around the gate. After that, a first plasma enhanced chemical vapor deposition (PECVD) process is performed to form a silicon nitride layer over the substrate and the gate. A second plasma enhanced chemical vapor deposition process is then performed to form a TEOS based silicon oxide layer on the silicon nitride layer. A photo-etching process follows to form a contact hole extending through to the source and drain respectively. Then, a conductive layer is filled into the contact holes and electrically connected to the source and drain.
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