Integrated circuit package having inductance loop formed from same-pin-to-same-bonding-pad structure
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United States of America Patent
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Issued Date -
Mar 3, 2005
app pub date -
Aug 27, 2004
filing date -
Aug 28, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An integrated circuit package includes an inductance loop formed from a connection of bonding wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from a first wire which connects a bonding pad on the integrated circuit chip to an I/O pin of the package and a second wire which connects the same bonding pad to the same pin. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization.
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