Semiconductor device
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United States of America Patent
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Issued Date -
Feb 17, 2005
app pub date -
Aug 4, 2004
filing date -
Aug 12, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A semiconductor device comprising a memory cell which includes: a pillar-shaped semiconductor layer of a first conductive type formed on a semiconductor substrate; source and drain diffusion layers of a second conductive type formed in upper and lower portions of the pillar-shaped semiconductor layer; a semiconductor layer of the second conductive type or a cavity formed inside the pillar-shaped semiconductor layer; and a gate electrode formed on a side face of the pillar-shaped semiconductor layer via a gate insulating film, or a control gate electrode formed on the side face of the pillar-shaped semiconductor layer via a charge accumulation layer.
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