Method for performing single instruction multiple data operations on packed data
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United States of America Patent
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N/A
Issued Date -
Feb 3, 2005
app pub date -
Jul 26, 2004
filing date -
Jul 31, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Instructions for performing SIMD instructions, including parallel absolute value and parallel conditional move instructions, as well as a method and circuit for saturating results of operations. The parallel absolute value instruction determines the absolute value of operands based on the sign bit of the operands. When a parallel conditional move instruction is executed, status indicators corresponding to an operand are compared to a condition code in a register to determine whether the condition is true for any of the status indicators; if the condition is true, the corresponding operand is moved to a specified register. A method and circuit for handling saturation of a result of an operation are also provided. When two m-bit operands are added, as in an addition, average, or subtraction operation, if an average instruction is executed, the m most significant bits are output; otherwise, the m least significant bits are output and the result is saturated if there is overflow and saturation is enabled.
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