Method and device for creating a model of a circuit for the formal verification

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United States of America Patent

APP PUB NO 20050010882A1
SERIAL NO

10855856

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Abstract

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For the simplified creation of models of a circuit for the formal verification of the same, it is proposed to provide a valid first model (a) for example from a simulation of the circuit (2) and to generalize this valid first model through modification (3), whereby after the modification it is checked whether the modified model still describes an actual behavior of the circuit (4). In this case, the modified model is provided as a model of the circuit for the formal verification of the same (5).

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Patent Owner(s)

Patent OwnerAddress
ONESPIN SOLUTIONS GMBH80339 MÜNCHEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bormann, Jorg Pullach, DE 3 9
Winkelmann, Klaus Riemerling, DE 13 36

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