Fabrication method of semiconductor integrated circuit device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20040253828A1
SERIAL NO

10864638

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An object of the present invention is to provide a fabrication method of a semiconductor integrated circuit device capable of improving the throughput, reducing the cost of a cleaning gas and prolonging the life of a process kit by automatically detecting the end point of cleaning in a chamber. A cleaning gas converted into plasma in a plasma gas generator is introduced into a chamber to remove an unnecessary film deposited over the interior wall of the chamber or electrode. By an RF power source adjusted to low output from the film formation time, a high frequency voltage is applied to a lower electrode and an upper electrode. This voltage is detected by an RF sensor and amplified by an electronic module. The voltage thus amplified by the electronic module is input to a termination controller. The termination controller automatically judges the termination of cleaning when the voltage thus input becomes substantially constant at a predetermined voltage or greater.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO 135-0061

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ozawa, Takeshi Kofu, JP 57 1683
Sato, Yasuyuki Ryuou, JP 53 598

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation