Multi-channel line interface unit with on-chip clock management
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United States of America Patent
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Issued Date -
Dec 16, 2004
app pub date -
Jun 13, 2003
filing date -
Jun 13, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Multi-channel line interface unit with on-chip clock management. A method for clocking a multi-channel Line Interface Unit (LIU) embodied in an integrated circuit and having a plurality of channels is disclosed. Each channel has a receive path and a transmit path. An reference clock input is provided for receiving an external reference clock signal. A free running on-chip clock is generated that is synchronized to the reference clock signal. On at least two of the channels, transmit or receive data clocks and associated corresponding transmit and receive data operating at an associated data rate are received. Transmit and receive data are processed on each of the respective channels with a portion of the processing occurring in the digital domain. A separate channel clock is generat from the free running clock for each of the at least two channels and synchronized to the respective received transmit or receive data clocks and referenced to the free running on-chip clock, such that the received transmit or receive data clocks can be independent of each other and referenced to a single external reference signal. A controller is operable to utilize the respective separate channel clock by the digital portion of the step of processing in the respective channel.
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