Method for operating a circuit arrangement containing a microcontroller and an eeprom
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United States of America Patent
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N/A
Issued Date -
Dec 2, 2004
app pub date -
Jul 14, 2004
filing date -
Sep 4, 2001
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The invention relates to a method for operating a circuit arrangement containing a microcontroller (10) and an EEP-ROM (11). A first memory area (39) having at least one data set memory (DA1, DA2, DA3) and at least one second memory area (30) also having at least one data set memory (DB1, DB2, DB3) are provided in the EEPROM (11). A pointer (P1, P2, P3) located in a third memory area (31) refers to the respectively valid memory area (29, 30). In one step (53), the microcontroller (10) stores a data set in the invalid memory area (29, 30) and, in a subsequent step (54), changes the pointer (P1, P2, P3) so that the invalid memory area (29, 30) becomes the valid memory area (30, 29). Both steps (53, 54) are cyclically repeated. In the event of a fault during a storage process, a correct data set is available at all times in the memory area (29, 30) indicated as being valid.
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