Integrated ATM/packet segmentation-and-reassembly engine for handling both packet and ATM input data and for outputting both ATM and packet data
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United States of America Patent
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app pub date -
Jun 15, 2004
filing date -
Mar 30, 2000
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Abandoned
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Abstract
An integrated ATM/packet segmentation-and-reassembly engine for handling both packet and ATM input data and outputting packets containing information from both the packet and ATM input data. The integrated ATM/packet segmentation-and-reassembly engine is also configured for receiving packets containing information destined for transmission as ATM cells and information destined for transmission as packets, perform the segregation function and segmentation function on the information destined for transmission as ATM cells in order to output both ATM cells and packets. Architecture includes the ability to output both ATM cells and packets on a single optical fiber.
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