Floating gates having improved coupling ratios and fabrication method thereof
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United States of America Patent
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Issued Date -
Oct 7, 2004
app pub date -
Apr 3, 2003
filing date -
Apr 3, 2003
priority date (Note) -
Abandoned
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Abstract
A method for fabricating floating gates having improved coupling ratios. The method includes forming a tunneling dielectric layer, a conductive layer and an insulation layer sequentially on a semiconductor substrate, defining and etching the tunneling dielectric layer, the conductive layer, the insulation layer and the semiconductor substrate to form two trenches, filling the two trenches with insulation material to a level lower than the conductive layer, thereby forming shallow trench isolation structures, removing the insulation layer, and forming a pair of conductive spacers on the two sidewalls of the conductive layer, such that the tops of the conductive spacers are lower than the surface of the conductive layer, with the conductive spacers and the conductive layer form the floating gate.
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